工作類別: 數位ic設計工程師

Responsibilities: To be discussed in detail during further communication. Qualification: Over 5 years of experience in C++ development Experience in user-space application …

Job Description: Design and implement the FPGA/CPLD function on the server motherboard and related sub cards. Complete FPGA/CPLD code writing and implementation, build …

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …

General Solution Architect / Execution PM ※Job Contents Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …

The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …

The Jasper engineering team is seeking a Product Engineer to help drive the industry’s leading formal verification tool. The Product Engineer (PE) bridges the gap between …

This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which …