T－MTS Silicon Design Engineer（遠端）

1. Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI.
2. Responsible for industry leading IP regularly regression.
3. Responsible for function ECO implementation and LEC/DRC check.
4. Work with global IP teams to guarantee IP delivery quality. 6 .Work with multiple global SOC teams to implement Tile. 7 .Work with multiple global SOC teams to accomplish successful tapeout for company Sever/Client/dGPU/SCBU products.
5. Work with front-end integration team and physical design team on timing closure.
6. Co-ordinating design and implementation activities.