類別: source-104

Chip level ESD design & analysis.

Perform Netlist-to-GDS design flow, including floor planning, placement optimization, clock tree synthesis and routing. Support STA timing analysis and fixing. Perform physical …

Job Summary: Responsible for planning, development and implementation of the Company’s marketing strategies, marketing communications, and public relations activities, both …

We are looking for talented and passionate Embedded Software Engineer to be part of an exciting team. You will have an enormous opportunity to make a large impact on the design, …

AiXense VSaaS/Orbweb Connect Sales The AiXense/Orbweb Connect Platform Sales explores and develops with the assigned targeted market. Based on assigned markets, the platform Sales …

Job Description & Requirement Perform physical synthesis from RTL or gate-to-gate optimization Take responsibility for netlist, SDC and design quality check with customer Chip …

Location: Taichung, Taiwan Degree: Bachelor Experience: 5-10 years above Team: Field Service Engineer Job Category: Electrical engineering Full time | Long-term PT | Contractor Job …

PLEASE APPLY THIS JOD FROM THIS LINK: https://grnh.se/82616afd1us About the role Please note, this team is hiring across all levels and candidates are individually assessed and …