Chip Application Front-End Staff ※ Job Contents:
Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …
Job Description & Requirement
Perform physical synthesis from RTL or gate-to-gate optimization Take responsibility for netlist, SDC and design quality check with customer Chip …
Physical Design Staff ※ Job Contents:
Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …
Performs detailed semiconductor account analyses including but not limited to review discussion forum websites and product specifications. Plans, analyzes, and participates in …