DRAM DDRPHY Digital Part Circuit Design: 1. study and know the spec of DRAM (inculdeDDR5/DDR4/DDR4/LPDDR5/LPDDR4/LPDDR3) 2. study and know the protocol between memory controller 3. …
Responsibilities : 1.Responsible on STA / design constraint validation for advanced technology nodes. 2.Develop new Timing Signoff flow. 3.Co-work with PD owners for Project Timing …
General Solution Architect / Execution PM
※Job Contents
Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …
Physical Design Staff ※ Job Contents:
Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …
1.Work with team members and apply design techniques to work on different phases of complex logic design for ASIC/SOC project. 2. Working on the following tasks from time to time: …
Key Responsibilities • Defect Triage & Analysis: Investigate and categorize reported issues, including incorrect computation results, API failures, and build errors across …
The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …