1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. …
DRAM DDRPHY Digital Part Circuit Design: 1. study and know the spec of DRAM (inculdeDDR5/DDR4/DDR4/LPDDR5/LPDDR4/LPDDR3) 2. study and know the protocol between memory controller 3. …
Performs detailed semiconductor account analyses including but not limited to review discussion forum websites and product specifications. Plans, analyzes, and participates in …
Pantherun is a cyber security and data communications company that has designed a One-of-a-kind Chip and software based Intellectual Property for secure Ethernet Communication …
Chip Application Front-End Staff ※ Job Contents:
Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …