類別: 數位ic設計工程師

Job Contents: Communicate with customers to provide suitable test architecture planning for project scope Working with the APR team to ensure to correct DFT implementation …

The Jasper engineering team is seeking a Product Engineer to help drive the industry’s leading formal verification tool. The Product Engineer (PE) bridges the gap between …

Position Description • Physical implement the high-performance core with the foundry advanced process technologies • Collaborate with R&D to deliver high quality Innovus …

※ Job Contents: Block/Chip level DFT feature and architecture definition. DFT specification generation and review with customer co-work. Implement block/chip level DC/AC SCAN, …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …

Responsibilities: To be discussed in detail during further communication. Qualification: Over 5 years of experience in C++ development Experience in user-space application …

Job Description & Requirement Perform physical synthesis from RTL or gate-to-gate optimization Take responsibility for netlist, SDC and design quality check with customer Chip …