類別: 數位ic設計工程師

Key Responsibilities • Defect Triage & Analysis: Investigate and categorize reported issues, including incorrect computation results, API failures, and build errors across …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …

1.Work with team members and apply design techniques to work on different phases of complex logic design for ASIC/SOC project. 2. Working on the following tasks from time to time: …

【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表: https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/SRAM-Characterization-and-Modeling-Engineer_3078557 【Talents who apply job …

【本職缺優先審核至高通官網投遞人選】 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 Apply here: …

Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI. Responsible for industry leading IP regularly regression. …

General OSC/PLL/DLL/SSCG/CDR design & production experience LC-tank VCO design & production experience CDR design & production experience