Define, manage, and execute design verification strategies for complex semiconductor projects.
Work directly with Taiwanese clients to ensure successful project delivery and …
Work in PD flow: synthesis, DFT, floorplan, power planning, placement, CTS, routing, timing closure, ECO, IR/EM signoff, and physical verification is a plus.
Co-work with physical …
The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …
Perform Netlist-to-GDS design flow, including floor planning, placement optimization, clock tree synthesis and routing. Support STA timing analysis and fixing. Perform physical …