Job category: 數位ic設計工程師

General Solution Architect / Execution PM ※Job Contents Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …

The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …

The Jasper engineering team is seeking a Product Engineer to help drive the industry’s leading formal verification tool. The Product Engineer (PE) bridges the gap between …

This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which …

1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. …

Chip Application Front-End Staff ※ Job Contents: Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …

Analog Design Engineer (Power) Tasks & Responsibilities 1.Circuit design from the transistor level, up to the system level simulation of analog/mixed-signal IC, such as DC/DC, …