Responsibilities: To be discussed in detail during further communication.
Qualification:
Over 5 years of experience in C++ development Experience in user-space application …
Job Contents:
Communicate with customers to provide suitable test architecture planning for project scope Working with the APR team to ensure to correct DFT implementation …
General Solution Architect / Execution PM
※Job Contents
Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …
The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …
1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. …
Analog Design Engineer (Power)
Tasks & Responsibilities 1.Circuit design from the transistor level, up to the system level simulation of analog/mixed-signal IC, such as DC/DC, …