Job category: 數位ic設計工程師

Propose design verification plan and do the execution based on IP and system HW architecture/application Develop design verification environment Develop required verification …

Work in PD flow: synthesis, DFT, floorplan, power planning, placement, CTS, routing, timing closure, ECO, IR/EM signoff, and physical verification is a plus. Co-work with physical …

Ability to investigate spec, update testlist, build test case; knowledge of SVA, coverage analysis is plus. Co-work with design verification teams.

Job Description The Axiado Platform Integration Team is looking for an innovative, Systems Engineer, with a passion for learning, to focus on Platform System Integration. The …

Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI. Responsible for industry leading IP regularly regression. …

General Solution Architect / Execution PM ※Job Contents Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …

工作職務: 1.MCU控制電源數位設計, USB PD, Charger Protocol設計。 2.數位Synthesis & DFT,混合訊號測試設計。 3.電路驗證。 專長: (1)專精數位Verilog RTL設計。 (2)熟悉ARM/8051 MCU,和混合訊號電路設計,具有電源知識尤佳。 (3)熟悉USB PD, Charger …

Job Description & Requirement Perform physical synthesis from RTL or gate-to-gate optimization Take responsibility for netlist, SDC and design quality check with customer Chip …