Responsibilities: To be discussed in detail during further communication.
Qualification:
Over 5 years of experience in C++ development Experience in user-space application …
Chip Application Front-End Staff ※ Job Contents:
Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …
Pantherun is a cyber security and data communications company that has designed a One-of-a-kind Chip and software based Intellectual Property for secure Ethernet Communication …
The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …
1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. …
Physical Design Staff ※ Job Contents:
Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …